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9.1 Serilog wiring

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Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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Fritiof Hedman
2026-06-07 16:08:07 +02:00
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IMPLEMENTATION.md
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@@ -210,7 +210,7 @@ Each type lives in `src/FrameProcessor/Domain/`. Tests in `tests/FrameProcessor.
## Phase 9 — Observability
### [ ] 9.1 Serilog wiring
### [x] 9.1 Serilog wiring
- `UseSerilog` with console + rolling file sinks (`logs/frame-processor-.log`, daily).
- Structured fields: `FrameName`, `MacAddress`, `InputSource` (file/url), `InputBytes`, `OutputBytes`, `ElapsedMs`, `MqttPublished`.
- Log one info line per upload at completion.